Automatic apparatus for sequencing repair work in optimum order on malfunctions of grouped operating machines

ABSTRACT

Apparatus for use in a mill having a plurality of operating machines, wherein the apparatus includes sensing means for detecting machine malfunctions, memory means for determining the order in which repairs should be made to malfunctioning machines, and a repair operator&#39;&#39;s carriage having means for moving it from one malfunctioning machine to another in the predetermined order and along the shortest route.

United States Patent [1 1 on 3,824,558 Koshiba July 16, 1974 AUTOMATICAPPARATUS FOR 3,559,131 1/1971 Carlock et al. 340/1725 SEQUENCING REPAIRWORK IN eem a OPTIMUM ORDER 0N MALFUNCTIONS OF 3,588,832 6/]97] Duncan340/1725 GROUPED OPERATING MACHINES [76] inventor: Hefii Koshiba, l4-l7,lzuminomachi 6-ch0me, Kanazawa Japan Primary Examiner-Paul J. HenonAssistant Examiner-Melvin B. Chapnick [22] filed; June I972 Attorney,Agent, or FirmRobert E. Burns; Emman [2|] Appl. NO,1 267,013 uel J.Lobato; Bruce L. Adams Related US. Application Data [63]Continuation-impart of Ser. No. 73,694, Sept. 2],

I970, abandoned. [57] ABSTRACT Foreign Application Priority DataApparatus for use in a mill having a plurality of oper- Sept. 19, l969Japan 44-74840 ating machines, wherein the apparatus includes sensingmeans for detecting machine malfunctions, mem- [52] U.S. Cl. 340/1725ory means for determining the order in which repairs [5| Int. Cl. G06f11/00 should be made to malfunctioning machines, and a re- Field ofSearch-m 340/1725. 6.l C pair operators carriage having means for movingit from one malfunctioning machine to another in the [56] ReferencesCited predetermined order and along the shortest route.

UNITED STATES PATENTS 3,173,335 3/1965 Bateman H 340/1725 X 7 Claims, 13Drawing Figures l g LOOM LOOM LOOM 0 CAR 0 [9 0 49 0 LOOM I f 19 0 O O OO 9 LOOM LOOM I O l 19 0 DE TEC TOR SWITCH Pmminmw 3.824.558

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812 i 7' unraoargg MOTOR 330A 803 294833 -825 CONTROL 822 MEMORYDETECTOR AUTOMATIC APPARATUS FOR SEQUENCING REPAIR WORK IN OPTIMUM ORDERON MALFUNCTIONS OF GROUPED OPERATING MACHINES RELATED APPLICATION Thisapplication is a continuation-in-part application of our copendingapplication Ser. No. 73,694 filed Sept. 21, I970, now abandoned.

BACKGROUND OF THE DISCLOSURE The present invention relates to automaticapparatus for moving a carriage for transporting a repair operatorbetween a plurality of machines. The apparatus senses malfunctions ofthe machines, determines the priority in which repairs must be made, andadvances'the carriage to the various malfunctioning machines accordingto the priority sequence and along the shortest route.

When manufacturing work such as a weaving operation is performed by aplurality of operating machines installed in a mill, cases areencountered wherein two or more machines stop simultaneously due to suchcauses as consumption of the material, malfunction of some machineparts, completion of an operation cycle requiring the machine to bereset, or accidental breakage of the material during processing.Furthermore, it may be necessary in some instances to perform serviceprocedures even when the machines themselves do not stop. Such servicingand repair of the machines must be performed as quickly as possible soas to maintain the operational efficiency of the machines. Usually, thisrepair work is performed by operators who watch the op erationalcondition of the machines in the mill, and eliminate any malfunctionswhich are recognized. Some of the malfunctions can be repaired veryeasily and within a short time, while other malfunctions requirecomplicated repair and a long down-time for that machine. Therefore,when multiple malfunctions occur simultaneously, and at differentmachines, it is necessary for the operator to decide the sequence inwhich the machines must be serviced. In the case ofa weaving mill, forexample, wherein thread breakage may occur in one of a plurality ofweaving looms, it is necessary for the weaver to rush to that loom tomend the thread. When the abovedescribed malfunction takes place atseveral looms simultaneously, the weaver has to decide which loom heshould rush to first. Conventionally, this decision is based on theoperators empirical judgement, and if such decision is erroneous, itresults in a serious decrease in the operational efficiency of themachines.

A principal object of the present invention is to provide an apparatuscapable of sequentially carrying the repair operator to a plurality ofmalfunctioning machines in accordance with the optimum priority in whichrepairs should be made, thereby maintaining the highest operationalefficiency of the machines.

SUMMARY OF THE INVENTION In order to attain the above-described object,in the automatic apparatus of the present invention, information signalscorresponding to the causes of the machine malfunctions are comparedwith predetermined patterns of operational priority signals for themachines, whereupon an address signal of the machine producing theinformation signal of first priority is produced. This address signal iscompared with an address signal of the carriage, and the resultantdistance signal is used for selection of the driving direction of thecarriage. Both the priority machine address signal and the directionsignal are brought into a control circuit of the carriage, whichproduces a corresponding operational signal for exciting the drivingmeans of the carriage. The instantaneous location relationship betweenthe carriage and the machine of the first priority is continuouslydetected, and the carriage is stopped when it arrives at the location ofthe priority machine. Driving control of the carriage can be shiftedfrom automatic to manual and vice versa.

BRIEF DESCRIPTION OF THE DRAWINGS Further features and advantages of thepresent invention will be made apparent from the ensuing description,which is directed, for the convenience of the explanation, to the casewherein a plurality of weaving looms are installed in a weaving mill,reference being made to the accompanying drawings, wheerein:

FIG. I is a block diagram of a principal arrangement of the automaticapparatus of the present invention,

FIG. 2 is a block diagram of a detailed arrangement of the memory meansshown in FIG. 1,

FIG. 3 is a block diagram of the memory circuit shown in FIG. 2,together with its related display parts,

FIG. 4 is a schematic plan view of a mill equipped with a plurality ofmachines and corresponding car riage detector switches,

FIG. 5 comprising FIGS. 5-] and 5-2 is a detailed logic circuit ofmemorizing means 2 and comparing means 3 of FIG. 1,

FIG. 5A is the waveform of the output signal of control unit 101 of FIG.5,

FIG. 6 is a detailed block diagram of direction selector circuit 6 ofFIG. 1,

FIG. 7 is a logic circuit of gate circuit 320 of FIG. 6,

FIG. 8 is a block diagram of the auxiliary circuits which apply thecontrol signal to a carriage,

FIG. 9 shows a plurality of machines and corresponding paths of acarriage together with a plurality of cross points,

FIG. 10 shows the logical structure of a cross point, and

FIG. 11 is a detailed block diagram of the logic circuit of a carriage 9of FIG. 1.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT In a preferredembodiment of the invention, as illustrated in FIG. 1, the automaticapparatus includes a plurality of looms I, which have means for sensingfailures and for generating malfunction signals A, composed ofcause-information signals A and machine address signals A The signals Aare centralized and brought into memory means 2 connected to respectivelooms l. The cause-information signals A are given characteristicpatterns in accordance with the kinds and types of the causes of theloom malfunction, while the locations of the looms l producing the causeinformation signals A, are represented by the predetermined machineaddress signals A:-

The combined output signal A, from the memory means 2, defining thepriority values and positions of the malfunctioning machines is coupledto a priority comparator and memory means 3, which is provided with acircuit for scanning the priority sequence of the information signals A,in reference to a reference operation pattern signal B previously storedin the comparator and memory means 3. By the operation of this priorityscanning circuit, the information signals are sequentially registered ina register of the comparator and memory means 3 in the order of theirpriority.

In some cases, two or more loom malfunctions have equal priority. Inorder to select the loom malfunction of the first priority, the addresssignals of the looms producing the registered information signals arecompared with a carriage address signal G. In the case where themalfunctions of two looms are ranked equally, in view of the referenceoperation pattern signal B, the loom located closest to the position ofthe operators carriage is selected as the loom of the first priority,and a corresponding priority loom (machine) address signal C is producedso as to be transmitted to a control circuit 4 on the operators carriage9. This priority loom address signal C is compared with the carriageaddress signal G within the comparator and memory means 3. Both theaddress signal C and the carriage address signal G are brought into adirection selector circuit 6 and a resultant direction signal E iscoupled to the control circuit 4 of the carriage 9. Upon receipt of thepriority loom address signal C from the comparing means 3 and thedirection signal E from the direction selector circuit 6, the controlcircuit 4 produces an operational command signal F which is coupled tothe driving means 7 for the carriage. The driving means 7 is providedwith a device for producing the carriage address signal G showing thelocation of the operators carriage 9 with respect to a reference pointfixed in the mill. This carriage address signal G is transmitted to acarriage-loom address comparator 8 also receiving the priority loomaddress signal C from the comparator and memory means 3. When thecarriage 9 arrives at the location of the loom of the first priority,the carriage loom address comparator 8 produces a stop signal H, and thedriving operation of the driving means 7 is thereby terminated. Uponarrival at the loom, the operator performs the repair work necessary toeliminate the malfunction of that loom, and, after completion of thisrepair work, the loom is restarted and a signal reporting thiscompletion of the repair work resets the automatic apparatus of thepresent invention.

Control of the driving means 7 can be shifted from automatic to manualby operating a switch mounted on the carriage 9, so that it is alsopossible for the operator to manually control the driving means 7 of thecarriage to direct it on the basis of his empirical judgement.

In a practical embodiment, signals C and E are transmitted to a carriage9 through an auxiliary circuit (not shown in FIG. I). The structure ofsaid auxiliary circuit will be explained later in connection with FIG.8.

A detailed arrangement of the memory means 2 is shown in FIG. 2, whereinthere are provided encoders 11 related to the respective looms I, aninformation center 12 connected to the respective loom encoders 11, anda buffer memory 13 coupled between the information center 12 and amemory 14.

When the malfunction takes place on a certain loom 1, this malfunctionis first sensed by a corresponding mechanical signal. For example,breakage of a warp may be detected by a downward movement of acorresponding dropper. Next, this mechanical signal is transduced into acorresponding electric signal and further encoded into a correspondingmalfunction causeinformation signal by the encoder ll associated withthat loom l. Malfunction cause-information signals, obtained in thismanner, are subjected to a scanning operation by a scanning pulse signalI emitted by the information center 12, and the picked up informationsignals are transmitted to the information center 12. Simultaneously,the address signals of the malfunctioning looms are also transmitted tothe information center 12. In this case, the address signals areinformative of the location of the loom of malfunction with respect tothe 0 reference point suitably selected in the mill. The address of thelooms may be given in the form of matrix representations or in the formof X Y coordinates. From this information center 12, the informationsignals are transmitted to the buffer memory 13 which is provided with adistribution circuit. By the operation of the distribution circuit,these information signals are compared with data signals previouslyprovided in the buffer memory 13 and are registered into the memory 14according to the kinds and types of the causes of the loom malfunctions.

In the arrangement shown in FIG. 2, the memory 14 may be connected toadditional elements as shown in FIG. 3. An accumulator 16 foraccumulating the nonrunning time of the looms and a display panel 18 forthe causes of the loom malfunctions are connected in parallel to thememory 14, in an arrangement receptive of the output signal of thememory 14. A display panel 17 for the nonrunning time for the respectivemalfunctions is connected to the accumulator 16.

In the case of the above described embodiment, the driving means 7 isprovided with a device for producing the carriage address signal Gshowing the location of the operator's carriage 9 with respect to the 0point fixed in the mill. However, this device can be replaced by spaceddetector switches 19 planted in the floor of the mill along theadvancing paths of the operators carriage 9, as shown in FIG. 4. Whenthe operators carriage 9 passes the position of a certain detectorswitch 19, that detector switch 19 produces a signal corresponding tothe carriage address signal G and this signal is transmitted to thecomparator and memory means 3. The pattern of the signal is formedaccording to the relationship of the location of that detector switch 19with respect to the 0 point fixed in the mill. Further, the advancingdirection of the operators carriage 9, during its travel, is also sensedby these detector switches 19. The detector switches 19 may beinterspersed so as to show the location of the carriage 9 either in amatrix representation or in the form X Y coordinates.

The operation of memorizing means 2 and comparing means 3 in FIG. 1 willnow be explained in full in connection with the logical circuit of FIG.5. In FIG. 5, machines la, 1b, 1n correspond to a loom l of FIG. 1. Acircuit having address counter 102, binarydecimal converter 102a anddriver 103 corresponds to information center 12 of FIG. 1. A circuithaving gate 126, register 13], gate 134 and their relating circuitscorresponds to buffer memory 13 of FIG. 1. A circuit having registercircuit and step up circuit 161 corresponds to memory 14 of FIG. I. Andthe rest of FIG. 5 corresponds to comparing means 3 of FIG. 1. Furtherpriority signals 141, 142 and 143 correspond to signal B of FIG. 1, andoutput signals 234 and 235 correspond to address signal C of FIG. 1. Asthe structure of the logical circuit of FIG. 5 is easily understood byanyone skilled in the art from above explanation and reference numbertable at the end of this specification, no explanation about thestructure of the logical circuit of FIG. 5 is necessary, and theoperation of FIG. 5 is next explained.

l. A pulse signal from control unit 101 steps up the content of addresscounter 102, which scans the machine address and gives an address of themachine which should forward the data. Each output terminal A, B, C, Dand E of control unit 101 gives the corresponding signal shown in FIG.5A.

2. The machine address given by address counter 102 is converted frombinary number to decimal number by binary-decimal converter 102a, andthe driving signal appears at one of the address lines 104 which providethe output signal of driver 103.

3. Data 106 from machine 1 (1a, 1b, In) is received by receiver 107, andsaid data 106 is stored in register 109 by read-signal 108 from controlunit 101 to register 109. Data 106 has condition flag 111, endflag 112,working information, and priority informatron.

4. When condition flag lll stored in register 109 is on, it means thecorresponding machine is requesting the work, and data 106 is processedonly when said flag IS on.

5. When condition flag 111 is on, and end flag 112 is off, AND gate 114and 115 connected to gate 113 open together with gate 113, then data 110is sorted by priority circuit 140 according to the priority of data 110.Said priority circuit 140 provides one of priority signals 141, 142 or143, which open one of the corresponding gates 144, 145 and 146.Accordingly, the machine number of the problem is stored in register160. The actual data 110 sent from the machine 1 is not stored inregister 160, but is indicated at the panel of the machine.

6. Said register 160 is controlled by step-up circuit 161 so as to storethe data from the most significant digit.

7. Suppose that end flag 112 of data stored in register 109 is l,flip-flop 151 is set to l and one-shotmultivibrator 166 is triggered,and the highest priority stored in one of registers 162, 163 and 164 isdetected by priority detector 165. One of flip-flops 171, 172 and 173 isset to 1 according to the coincidence of the output of one-shotmultivibrator 166 with one of the outputs of priority circuit 160.

8. If there is no data in register 160, that is to say, if work is notrequested, zero-detection circuit 168 detects this state and outputszero to output line 169, which closes gate 147. Therefore the operationof the circuit in FIGS. 5-1 and 5-2 finishes, and said circuit waitsdata 110 by keeping open gate 113.

9. If there is some data stored in one of registers 162, 163 and 164 ofregister 160, gate 147 opens and the output 120 of OR gate 121 becomes1, and said output 120 closes gate 113 through the invertor. Thereforeinput data cannot be received and gate 149 opens. The clock pulse 129from output terminal D goes through said gates 147 and 149, and opensgate 185, and the operation of priority decision begins.

10. At the same time output signal 148 of AND gate 147 opens AND gate130 through OR gate 121 and output signal 120, and data from machine 1is stored in register 131, which stores both the content of data and theaddress of the machine.

11. Initial operation control 216 has two flip-flops 186 and 188, andsome gates. Said flip-flops 186 and 188 are reset to zero by the outputof AND gate 228, The output of AND gate 228 is provided if there areboth pulse signals 228. from one-shot multivibrator 166 just afterappearing end-flag 112, and output signal 169 of zero detection circuit168. Said circuit 168 tests it there is any data stored in register 160.

12. In the condition that initial operation control 216 is set toinitial condition, when the second clock pulse appears from the outputof gate 149, output 189 of flip-flop 188 becomes 0 and gate 185 isclosed. Accordingly the operation of control 216 stops automatically.

13. The first clock pulse inverts flip-flop 186, and the output 169 ofzero detection circuit 168 opens gate 191 and closes gate 192. Gate 200is closed as output 230 of flip-flop 188 is zero. Accordingly output ofgate 199 becomes zero and gate 198 closes. At the same time register isstepped up.

14. When there is only one data in one of three registers 162, 163 and164 chosen according to priority, the second clock pulse provides zeroat output line 169 of zero detection circuit 168, and closes AND gate191. Gate 195 closes too as the outputs of gate 178, 179 and 180 arezero. At the same time, gate 192 opens, which opens gate 212 and sendsdata relative to the location of the machine from buffer register 202 tooutput line 215.

15. Output signal of zero detection circuit 168, which is now zero, isapplied to gate 229 through the invertor. and clock pulse 150 is alsoapplied to said gate 229 through gate 149. The output signal 157 of saidgate 229, and output signal 158 of gate 192 reset flip-flop 151 to zerothrough gates 153, 154 and 152. At the same time one-shot multivibrator231 is triggered, which provides priority signal 232.

16. When there are more than two data chosen according to priority inone of three registers 162, 163 and 164, output line 169 of zerodetection circuit 168 provides 1. Therefore gate 191 opens, which opensgate 195, and the machine location data 181 of the second machine, whichis the output signal of gates 178, 179 and 180, and distance data 184 toa carriage are stored in a buffer register 196. At this time flip-flop188 inverts, which closes gate 185. And as output line 230 providessignal 1, gates 203 and 204 open. Accordingly distance data stored inbuffer registers 196 and 202 are applied to comparison circuit 205.

17. Comparison circuit 205 provides the output signal and opens gate 213when distance data stored in register 202 is larger than that stored inregister 196. Accordingly machine location 208 stored in buffer register202, which has low priority, is sent to a buffer register 217 throughoutput line 214. Said register 217 also stores said data from the mostsignificant digit by means of step-up circuit 218.

18. As gate 210 opens at the same time, machine location data 207 storedin the buffer register 196 appears at output line 215. Further as gate200 and 198 open, the next data stored in a register having the secondpriority goes to the buffer register 202 with the next clock pulse.

19. On the other hand, when distance data stored in the register 196 isequal to or larger than that stored in the register 202, the output ofcomparison circuit 205 is zero and gate 209 opens. Accordingly machinelocation data 207 stored in the buffer register 196 goes to the bufferregister 202 through output line 214. Further, as gate 212 opens,machine location data 208 stored in the buffer register 202 appears atoutput line 215, and, opening gate 193 and 195, the next data is storedin the buffer register 196.

20. The above operation, of comparing two distances, is repeated untiloutput 169 of zero detection circuit 168 becomes zero. The machinelocation data with a larger distance which has a lower priority isstored in a buffer register 217.

21. As explained above, when the content ofa register with the highestpriority becomes zero, X coordinate 234, Y coordinate 235 and prioritysignal 232 relating to the machine with the highest priority areprovided by output signal 169 of zero detection circuit 168.

22. When the output of zero detection circuit 168 becomes zero, one ofgates 222, 223 and 234 opens and the data stored in the register 217returns to the original register.

23. Said operation finishes when the output signal 226 of zero detectioncircuit 225 becomes zero. Said output signal 226 opens gate 134 of thebuffer register 131 through OR gate 121, and AND gates 136 and 137. Aclock pulse from output terminal E of control unit 101 is applied togates 134 through 137. Said clock pulse is divided into short periodpulses, the number of which are proportional to the maximum memory capacity ofa register 131. The data 125 showing machine location and data110 showing working information stored in a register 131 go to prioritycircuit 140. The address of a machine corresponding to data 125 isstored in register 160 from priority circuit 140 through one of gates144, 145 and 146. Control unit 101 is designed so as to apply the nextclock pulse 129 (D in FIG. 5A) just after all data stored in the bufferregister 131 has been stored in the register 160.

24. Signal 226 opens gate 154 and resets flip-flop 151 through theinvertor just after the transportation of data between buffer registersfinishes. At this time as output 120 of OR gate 121 becomes zero, gate113 opens again and input data from machine 1 can be received.

FIG. 6 shows a detailed block diagram of direction selector circuit 6 ofFIG. 1, and FIG. 7 shows detailed logical circuit of gate circuit 320 ofFIG. 6. Carriage address signal G of FIG. 1 is applied to gate 304 and305 in FIG. 6 as X coordinate 620 and Y coordinate 621. Output signal330, 331 and 332 correspond to direction signal E of FIG. 1. The outputsignal of gate circuit 320 is applied to points in FIG. 9 so as tocontrol said points and lead the carriage 9 to the front of the machinewhich delivered a request. In FIG. 7, output 4 of decoder circuits 318and 319 are shown, but the outputs of more than 5 of decoder circuits318 and 319 are not shown for the sake of brevity.

The operation of FIG. 6 and FIG. 7 is described hereinafter.

1. As machine 1 is arranged to locate both sides of a path as shown inFIG. 9, a carriage 9 turns right or left according to the location of amachine. If the machine stands on the right side of the path, thecarriage turns to the right and vice versa. Priority signal 232 sets Xcoordinate 234 and Y coordinate 235 of the machine location to registers300 and 301, respectively. Output signal 330 which handles the carriagetoward the machine with the problem is provided according to the sense(0 or I of the least significant digit 334 of the X coordinate ofmachine location signal 234.

2. The path number that the carriage must go through in FIG. 9 iscalculated from X coordinate 234 of machine 1. The least significantdigit ofX coordinate 234 of machine location stored in the register 300is cleared as it has been used for handling of a carriage. The pathnumber 302 that the carriage must go through is obtained by shiftingsaid X coordinate right for one digit. Said path number 302 is appliedto comparison circuit 308 and compared with X coordinate 620 of thecarriage at this time, which is also applied to comparison circuit 308through gate 304. Output 324 of comparison circuit 308 determineswhether path number 302 is larger than X coordinate 620 of the carriageor not. Points A, B and C in FIG. 9 and FIG. 10 are controlled by saidoutput signal 324, the output of decode circuit 318 which decodes pathnumber 302, and the output of decode circuit 319 which decodes the Xcoordinate of a carriage at this time.

3. Comparison circuit 308 provides output signal one when path number302 is larger than X coordinate 620 of the carriage.

4. As explained hereinafter points A and B are controlled by one ofsignals a b (12b2, which are the output signals of gates 415 419 in FIG.7. Point C is controlled by one of signals ,6 which are the outputsignals of gates 410 414. For instance, suppose comparison circuit 308provides an output signal, decode circuit 318 provides an output signalat output terminal 0, and decode circuit 319 provides an output signalat output terminal 0. In such a case signals a b, and c appear as inFIG. 7, and thus corresponding points a,, b, and c, are controlled.

5. The direction of movement of the carriage is controlled as follows. Acarriage stands on the desired path when path number 302, where themachine is located, coincides with X coordinate 306 of a carriage. Inthis case comparison circuit 309 provides zero output. The othercomparison circuit 310 compares Y coordinate 621 of a carriage throughgate 305 with Y coordinate 303 of the machine. When Y coordinate 621 ofthe car riage is larger than Y coordinate 303 of the machine, saidcomparison circuit 310 provides output signal 326 and normal signal 331.On the other hand when Y coordinate 621 of the carriage is equal to orsmaller than Y coordinate 303 of the machine, said comparison circuit310 provides zero output, and reverse signal 332 is provided. The normalsignal 331 or the reverse signal 332 drives the carriage to the normaldirection or the reverse direction in the particular path.

6. The comparison circuit 309 provides output signal I when X coordinate306 of the carriage is not the same as path number 302. In this case Ycoordinate 303 of the machine and Y coordinate 307 of the carriage areapplied to an adder 311, which provides the sum 312 of them. Thecomparison circuit 313 compares said sum 312 with N provided fromconstant number generator 314, where N is equal to the number ofmachines lined in one path. If N is larger than the sum 312, thecomparison circuit 313 provides output 327 and normal signal 331 throughsome gates. On the other hand if N is equal to or smaller than the sum312, said comparison circuit 313 provides zero output and reverse signal332.

FIG. 8 shows a detailed block diagram of an auxiliary circuit whichsends a signal to the carriage and receives a signal from the carriage.In FIG. 8, priority end signal 333 from FIG. 6, coordinates 316 signalof the goal machine, normal signal 331, reverse signal 332, and handlingsignal 330 are applied to a unit circuit 610, 610A, The unit circuit 610provides output signal 622, which includes information of each inputsignal 333, 316, 331, 332 and 330. Output signal 622 is applied to thecarriage 9 through detector switch 19 by wireless. Further, the carriage9 provides signal 623 through detector switch 19 to unit circuit 610 bywireless. The X coordinate and Y coordinate of the carriage 9 at anymoment are obtained from said signal 623 through encoder 619. The numberof unit circuits 610 installed corresponds to the number of detectorswitches 19.

FIG. 9 shows the arrangement of a machine 1 and a path 21 of a carriage9 together with a point 22. A plurality of machines 1 are arranged onboth sides of a path 21 (0, l, 2, and constitute a pair of machine linesand l, 2 and 3, 4 and 5 Further common paths 21a and 21b are providedfor all machines commonly. Transportation of a carriage 9 between path210 or 21b, and path 21 is carried out through the switch over ofa point22. The switch over ofa point 22 is carried out, as mentioned above, bythe output signal of FIG. 7. That is to say, the carriage 9 of FIG. 1 isintroduced to the front of the machine of the problem through suitablecontrol of a point 22 of FIG. 9.

FIG. shows the logical structure of a point 22. A point 22 has sub-paths31, 32, 33 and 34, and subswitches A, B and C. Sub switch C connectssub-paths 31 and 34 when the control signal from gates 410 414 in FIG. 7is zero, while it connects sub-paths 32 and 34 when said signal is one.Further sub-switches A and B control the transportation of the carriagebetween subpath 33 and 34 through sub-path 31 or 32. Sub-switch Aconnects sub-path 31 with sub-path 33 when the control signal from gates415 419 in FIG. 7 is zero, and disconnects sub-path 31 with sub-path 33when said signal is one. Sub-switch B connects or disconnects sub-path32 with sub-path 33 according to the control signals from gates 415 419in FIG. 7.

FIG. 11 shows a circuit carried on the carriage 9 in FIG. 1. In FIG. 11,a circuit including drive circuit 820,

driving motor 821, motor drive circuit 827 and handling motor 829corresponds to driving means 7 in FIG. 1. A circuit including gates 811and 812, memory 813 and coincidence circuit 815 corresponds to addresscomparator 8 in FIG. 1. The rest of FIG. 11 corresponds to controlcircuit 4 in FIG. 1. In FIG. 11, reference numbers 331A, 332A, 316A and330A mean sensors which pick up the information signal from 331, 332,316 and 330 in FIG. 8 through detector switch 19 by wireless.

1. Normal signal from sensor 331A and reverse signal from sensor 332Aare stored in memories 808 and 817 through amplifiers 800 and 801,respectively. On one hand, a repairman watches and confirms the nextaddress of the machine to be repaired and its direction (normal orreverse) by means of display 805, and switches on the start switch 804.On the basis of said information, the output 819 of motor controller 818is applied to drive circuit 820. Therefore, the driving motor starts torotate in a predetermined sense, and the carriage 9 moves forward orbackward according to the sense of rotation of motor 821. Accelerator806 con trols the speed of the carriage 9 as desired.

2. Handling information from handling sensor 330A is stored in memory822 through amplifier 803. Handling motor 829 rotates in a senseaccording to the sense of said handling information. Therefore, thechair on which a repairman sits on the carriage 9 (not shown) turns itsdirection to the desired machine, and memory 822 is cleared by limitswitch 823.

3. During the carriage 9 stops, output 819 of motor controller 818 iszero, therefore, said output 819 opens gate 811 through invertor 830.Accordingly the coordinates of the goal machine as picked up by sensor316A is stored in memory 813 through said gate 811. When the carriage 9starts, gate 811 closes, and gate 812 opens. Coincidence circuit 815provides an output signal when the output of memory 813 coincides withthe output of gate 812. Said output signal clears memories 813, 808 and817 to zero, causing the motor 821 stop. Thus the carriage 9 stops infront of the desired machine.

The foregoing description has been given for clear ness of understandingonly. No unnecessary limitations should be understood therefrom, asmodifications will be obvious to those skilled in the art.

As an aid in the understanding of the logical circuits, described inthis specification, a reference number table is provided below.

Reference number table loom memorizing means comparing means controlcircuit direction selector circuit driving means address comparatorcarriage encoder information center buffer memory memory accumulatordisplay panel display panel l9. dcteclnr switch 2|. path point outputsignal of u llip-llop l5l data showing machine location AND gale ANDgate output signal of AND gate I35. I37. I38. I39. I40. I41. I42. I43.I44. I45. I46.

149. I50. I51. I52. I53. I54. I55. I56. I57.

I62. I63. I64. I65. I66. I67. I68. I69. I70. I7].

I72. I73. I74. I75. 176. I77. I78. 215.

302. 303. 304. 305. 306. 307. 308. 309. 310. 3] I. 312. a 313. 62l.

path path path path divided pulse AND gate zero detection circuit outputsignal of I38 priority circuit priority signal priority signal prioritysignal AND gate AND gate AND gate A ND gate output signal AND gate clockpulse OR gate AND gate AND gate output signal of AND gate I53 outputsignal of AND gate I54 output signal output signal register step upcircuit register register register priority detector one shotmultivibrator pulse signal zero detection circuit output line AND gateflip-flop flip-flop AND gate AND gate AND gate AND gate AND gate smallerdata register register path number Y coordinate of a machine gate gate Xcoordinate of the carriage Y coordinate of the carriage comparisoncircuit comparison circuit comparison circuit adder output of 3] I (sum)comparison circuit Y coordinate of a carriage output of 605 Referencenumber table I29. I30. l3l. I32. I33. I34.

I80. I81. I82. I83. I84. I85. I86. I87. I88. I89. I90. I91. I92. I93.

I96. I97. I98. I99. 200.

210. 2Il. 2l2. 2l3.

clock pulse AND gate register step up circuit clock pulse AND gate ANDgate AND gate machine location data computer circuit for distance thesame as 620 and 621 distance data to the carriage gate AND gate outputsignal AND gate gate gate

gate

gate

buffer register AND gate gate gate

gate

AND gate hufl'er register gate gate

comparison circuit output signal machine location data machine locationdata gate gate AN D gate AN D gate A N D gate larger data constantnumber generator gate output of 315 one shot circuit decode circuitdecode circuit gate circuit output of 308 output of 309 output signalhandling normal signal reverse signal priority end signal LSD (leastsignificant digit) AND gate OR gate binary-decimal converter AND gateoutput of 60] gate amplifier pointer pointer one shot circuit unitcircuit encoder X coordinate of the carriage memory (X, Y)

output signal of memory 813 coincidence circuit output signal ofcoincidence circuit 8I5 Reference number table 623. signal indicatingcarriage pass lil7. memory (reverse) 800. motor amplifier 8 l 8.controller 803. 8 l 9. output of Blll B04. start switch 820. drivecircuit 805. display 82 I. driving motor 806. accelerator 822. memory(handling) 80?. output of 800 823. limit switch B24. detection circuitof direction of the chair 808. memory (normal) 825. output signal 809.output of 80] 826. motor control circuit 8 IO. output of 802 827. motordrive circuit 8| 1. gate 829. handling motor 8l2. gate 1 claim: 15signals comprises means detecting a fault at a corre- I. An automaticapparatus for transporting an operadi g one of the looms and said workinformation tor t0 a plurality Of o tat ons in an p i signals comprisinginformation content representative quence comprising, a driven carriagefor transporting f th at r f the faults. an operator to work stations inan optimum sequence, 3 A t mati apparatus for transporting an operamoansat each Work Station having moans developing tor to a plurality of workstations in an optimum seoutput work information signals representativeof work quence a rdi to clai 2, in which said memory that i8 10 b6preformed at ll'lt? individual work stations means comprises encodersmeans connected to said and Work information signals having a P y andencoders emitting scanning signals for said encoders, a addressmemorymeans receptive of the output work buffer memory connected to the lastmentioned means information Signals and Work information signals forprovided with a distribution circuit and a memory concombining them intocombined work information sigr d to id buff r memory rials andmemorizing them, a P y comparator 4. An automatic apparatus fortransporting an operacuit receptive of the combined work informationsig- [or to a l li of work stations i an optimum mils from Said memorymeans for determining the p quence according to claim 3, in which saidmemory ority sequence of all the Combined 0rk inform i n means comprisesaccumulator means for accumulating Signals received and developingoutput P r y address the downtime of the individual looms, a displaypanel signals representative of the address priority of the seconnectedto said memory means and another display quence of work at the workstations, a directionnnected to said accumulator means. selector circuitreceptive of the priority address signals 5. An automatic apparatus fortransporting an operaand asignal representative of the instantaneousaddress tor to a plurality of work stations in an optimum seof thecarriage developing resultant direction signals, a quence according toclaim 4, in which said priority control circuit receptive of thepriority address signals comparator circuit comprises means receptive ofa reffrom said priority comparator circuit and said resultant erencesignal and means for comparing the work infordirection signals from saiddirection-selector circuit for mation signal with said reference signalsfor developing developing operational command signals for driving saidoutput priority address signals when some of the the carriage inaccordance with the command signals work information signals have equalpriority. and having means developing a signal representative of 6. Anautomatic apparatus for transporting an operathe instantaneous addressof the carriage relative to a tor to a plurality of work stations in anoptimum segiven reference address, and a work-address comparaquenceaccording to claims 5 including means to shift tor means for applying astop signal to the driving said driving means to manual control fromautomatic means when the carriage arrives at the work stationssecontrol. quentially in accordance with said priority. 7. An automaticapparatus for transporting an opera- 2. An automatic apparatus fortransporting an operator to a plurality of work stations in an optimumsetor to a plurality of work stations in an optimum seq n r ng to Claimin which Said driving quence according to claim 1, in which said meansat. means comprises means for reversibly driving said careach workstation comprises a loom at each work stariage. tion and said meansdeveloping the work information UNITED :SLIATES PATENT OFFICECERTIFICATE OF CORRECTION Patent No. 3 824,558 D t d July 16, 1974 IHEIJI KOSHIBA It is certified that error appears in the above-identifiedpatent and that said Letters Patent are hereby corrected as shown below:

COL. 5, line 64, delete "gates 147 and" and insert --gate-.

COL. 6, line 8, delete "228" and insert l67--.

REFERENCE NUMBER TABLE COL. 9

N0. 3. delete "comparing means" and insert comparator and memory means;

COL. 10

NO. 102A. delete "102A" and insert l02a. NO. 113. delete "AND".

COL. 11

NO. 144. delete "AND";

NO. 145. delete "AND";

NO. 146. delete "AND";

NO. 150. delete "clock pulse" and insert --output signal of gate 149";

NO. 178. delete "AND";

Page 2 Patent No. 3,824,558

D d July 16, 1974 Inventor )1113 L] I KOSHIBA It is certified that errorappears in the above-identified patent and that said Letters Patent arehereby corrected as shown below:

COL. 11

COL. 12

[SEAL] delete delete gate-- delete delete delete delete delete.

output "smaller data" and insert -output line--;

"timing counter" and insert -initial operation control-.

is to be added after "134. AND gate";

"ANDH HAND";

"AND":

IIANDII "larger data" and insert -output line;

signal-- is to be added after "135. output of after "handling" insert--signal;

inverter-- is to he added after "816. output signal coincidence circuit815";

Signed and Scaled this twenty-ninth D3) Of July 1975 A trees I.

RUTH C. MASON Allflslillg Officer

1. An automatic apparatus for transporting an operator to a plurality ofwork stations in an optimum sequence comprising, a driven carriage fortransporting an operator to work stations in an optimum sequence, meansat each work station having means developing output work informationsignals representative of work that is to be preformed at the individualwork stations and work information signals having a priority and anaddress, memory means receptive of the output work information signalsand work information signals for combining them into combined workinformation signals and memorizing them, a priority comparator circuitreceptive of the combined work information signals from said memorymeans for determining the priority sequence of all the combined workinformation signals received and developing output priority addresssignals representative of the address priority of the sequence of workat the work stations, a direction-selector circuit receptive of thepriority address signals and a signal representative of theinstantaneous address of the carriage developing resultant directionsignals, a control circuit receptive of the priority address signalsfrom said priority comparator circuit and said resultant directionsignals frOm said direction-selector circuit for developing operationalcommand signals for driving the carriage in accordance with the commandsignals and having means developing a signal representative of theinstantaneous address of the carriage relative to a given referenceaddress, and a work-address comparator means for applying a stop signalto the driving means when the carriage arrives at the work stationssequentially in accordance with said priority.
 2. An automatic apparatusfor transporting an operator to a plurality of work stations in anoptimum sequence according to claim 1, in which said means at each workstation comprises a loom at each work station and said means developingthe work information signals comprises means detecting a fault at acorresponding one of the looms and said work information signalscomprising information content representative of the nature of thefaults.
 3. An automatic apparatus for transporting an operator to aplurality of work stations in an optimum sequence according to claim 2,in which said memory means comprises encoders, means connected to saidencoders emitting scanning signals for said encoders, a buffer memoryconnected to the last mentioned means provided with a distributioncircuit and a memory connected to said buffer memory.
 4. An automaticapparatus for transporting an operator to a plurality of work stationsin an optimum sequence according to claim 3, in which said memory meanscomprises accumulator means for accumulating the downtime of theindividual looms, a display panel connected to said memory means andanother display connected to said accumulator means.
 5. An automaticapparatus for transporting an operator to a plurality of work stationsin an optimum sequence according to claim 4, in which said prioritycomparator circuit comprises means receptive of a reference signal andmeans for comparing the work information signal with said referencesignals for developing said output priority address signals when some ofthe work information signals have equal priority.
 6. An automaticapparatus for transporting an operator to a plurality of work stationsin an optimum sequence according to claims 5 including means to shiftsaid driving means to manual control from automatic control.
 7. Anautomatic apparatus for transporting an operator to a plurality of workstations in an optimum sequence according to claim 1, in which saiddriving means comprises means for reversibly driving said carriage.